GUWAHATI: The Indian Institute of Technology Guwahati researchers have made significant advancements in the field of Electronic Design Automation (EDA) with the development of an innovative machine learning (ML) framework named ‘LEAP’.
This cutting-edge solution enhances the design process of Integrated Circuits (ICs), a critical component in the $600 billion semiconductor industry that powers modern electronic devices.
The creation of ICs relies heavily on EDA software, which transforms high-level designs into a manufacturing format known as Graphic Design System (GDS). However, designing ICs involves navigating complex problems that can be challenging to solve. Traditional methods often use heuristic techniques—quick problem-solving strategies that find acceptable solutions without necessarily achieving perfection. While these approaches help balance design quality and runtime, they often yield less-than-ideal results.
To address these challenges, Prof. Chandan Karfa, Associate Professor and Dr. Sukanta Bhattacharjee, Assistant Professor, Department of Computer Science and Engineering, IIT Guwahati along with their BTech students Chandrabhushan Reddy Chigarapally, Harshwardhan Nitin Bhakkad, have leveraged machine learning to improve efficiency in IC design. The other collaborator is Dr. Animesh Basak Chowdhury of New York University USA.
Their LEAP framework streamlines the technology mapping process within EDA. Rather than evaluating thousands of potential configurations, LEAP intelligently identifies and prioritizes the most promising options, reducing the number of configurations the mapping tool must consider by over 50%.
Speaking about the research, Prof. Chandan Karfa said, “Our framework not only speeds up the mapping process but also improves the performance of the circuits. We have reduced the runtime of the EDA tool by 50% and achieveda 2% reduction in clock period without increasing the area required for the circuits, making our solution a significant advancement in electronic design automation.”
LEAP estimates the delay for various configurations and selects only the top ten options for each node in the design, compared to the traditional method, which typically evaluates around 250 configurations. This targeted approach streamlines the workflow and enhances overall efficiency.
In extensive testing on 21 different designs, the LEAP framework demonstrated a 50% improvement in runtime while reducing the number of configurations checked by over 51%. Compared to exhaustive mapping methods, LEAP achieves similar performance results while using 63% fewer configurations, significantly improving the runtime of the open-source ABC EDA tool.
This research holds real-world implications for the semiconductor industry, which is essential for the development of electronic devices such as smartphones and computers. By enhancing the design process for ICs through the LEAP framework, researchers can reduce design time and improve performance.
This translates to faster, more efficient electronic devices with lower energy consumption, ultimately benefiting consumers and driving innovation across various technology sectors.
The results of this promising work have been published in the ACM/IEEE International Conference on Computer-Aided Design (ICCAD 2024).
